Information carrying databits, or user data, which is connected through a switching unit belongs to channels, so called connections. User data belonging to each connection from respective input in the switching unit is, within the switching unit, connected to a respective selectable output in the switching unit.
A technology used in these applications is circuit connecting. A frequently occurring selector structure at circuit connections is called "Time Space time" (TST). Several time selector stages are, in switching units with this structure, connected to one space selector stage. User data is first connected through an input time selector stage, then through the space selector stage, and finally through an output time selector stage.
User data from several connections which is to be connected through a switching unit with a TST-structure is multiplexed together through time-multiplexing. The user data is, through the time-multiplexing, placed into time slots which are arranged into frames. In the connection of the user data through the switching unit it is moved between different time slots and frames. This is done by delaying the user data in memories within the time selector stages.
User data coming into an input time selector stage appear in so called incoming time slots. User data coming out from output time selector stages are positioned within so called outgoing time slots.
The function of the switching unit is controlled, whereby disturbances are identified. Measures are made to remove the disturbances, and to thus regain a faultless function for the switching unit.
One form of control is a so called parity control. Parity bits are generated both on the basis of user data appearing in incoming time slots, and on the basis of user data appearing in outgoing time slots. One parity bit is generated for each incoming time slot and one parity bit is generated for each outgoing time slot. The parity bits belonging to incoming time slots are positioned in direct connection with the user data within the time slots, one parity bit for each time slot, and is then connected through the switching unit together with the user data. The parity bits of the incoming time slots are then compared with the parity bits of the outgoing time slots.
Thus are parity bits which are generated on the basis of the user data before it is connected through the switching unit compared with parity bits which are generated on the basis of a the user data after it has been connected through the switching unit. If there is a difference then the user data probably has been altered on its way through the switching unit, and there is some kind of disturbance.
Another form of control is a so called through connection test (TCT). Through a through connection test it is controlled that a connection through a switching unit is correctly set. Parity bits are used in this control as well.
One or more parity bits, generated based on user data appearing in incoming time slots belonging to the connection, are given reversed parity. These parity bits with reversed parity are positioned in connection with the user data within the incoming time slots and are connected through the switching unit together with the user data. Consequently are parity bits with reversed parity to appear in outgoing time slots belonging to the connection.
If the connection is set up in an erroneous way then these parity bits with reversed parity will appear either in outgoing time slots not belonging to the connection in question or else they will not appear at all.
At a throughput of user data belonging to a connection which occupies several time slots in each frame, a so called wideband connection, it is important that the user data is not changed in their order of time but that the internal order of time is maintained.
This is achieved by placing user data, belonging to a wideband connection, appearing in incoming time slots within a mutual frame, firstly within the same mutual order of time in the outgoing time slots and secondly within a mutual frame.
Sequence integrity, meaning integrity regarding the mutual sequence order of the time slots within a data frame (Time slot Sequence Integrity, TSSI), and frame integrity, meaning the integrity of the time slots regarding their belonging to a mutual data frame, (Time slot Frame Integrity, TSFI), is thus achieved.
A disturbance in the function of a switching unit may result in that user data, belonging to a wideband connection which is connected through the switching unit, and which appears in incoming time slots belonging to a mutual frame, is placed in outgoing time slots belonging to mutually different frames, with the result of lacking TSFI.
The following publications describes part of prior art within this area:
U.S. Pat. No. 4,048,445
This publication describes a TST switch, where parity bits are used to perform a through connection test (TCT). Incorrect parity is inserted with user data to the input in question immediately after the connection is establishes whereafter the outlets of the switch are checked to determine what output/s that are having incorrect parity.
A comparison is done between the the output/s having incorrect parity with the intended output/s. A simple circuit arrangement for distinguishing deliberately introduced wrong parity from through connection faults is also disclosed.
EP-A1-0 152 974
This publication describes a system in which the parity of many bit groups must be checked. These bit groups are checked simultaneously and jointly. The parity bits generated by parity generators are interchanged crosswise, are combined with the parity bits contained in the bit groups and applied to a common output. The checking circuit itself is checked by inverting one of the parity generators periodically.
JP-A-6 62480
This publication describes a time division type switch wherein the error of double write or a failure in write to time slots is monitored. At the input of the switch the parity is inverted with respect to a number of arbitrary time slots in a frame. At the output of the switch the inverted parity bits are detected and counted.
A comparison is performed with the number of arbitrary selected time slots in the frame, wherethrough an error is determined. The intraframe inversion position is changed in every frame to perform confirmation for all time slots.
U.S. Pat. No. 4,532,624
This publication describes a circuitry for validating the integrity of user data, in the form of PCM data, transmitted through a digital switching network is shown. The space stage of the switching system requires that appropriate data validity be maintained throughout. A parity scheme is employed to fulfill this requirement.
For detection of invalid parity, an alarm notification is sent to the central processing unit (CPU) of the switching system.
The CPU may then interrogate the space switching circuitry to determine the particular location of the parity failure. In addition, the circuitry provides for a testing feature, such that, the operation of the parity checking circuits may be validated.
U.S. Pat. No. 4,704,716
This publication describes a control of a wideband connection established through a TST-switching network. Additional buffer memories are added to the initial and final stages of the time-space-time switching network to insure that all the data received in one time frame from a given facility segment is assembled only into the same time frame for transmission on an outgoing facility segment.